Article · Wikipedia archive · Last revised Jul 17, 2026

MB86900

The MB86900 is a microprocessor produced by Fujitsu, which implements the SPARC V7 instruction set architecture developed by Sun Microsystems. It was the first implementation of SPARC, introduced in 1986, and was used in the first SPARC-based workstation, the Sun Microsystems Sun-4, from 1987. Its chipset operated at 16.67 MHz. The chipset consisted of two chips, the MB86900 microprocessor and the MB86910 floating-point controller. The chip set was implemented with two 20,000-gate, 1.2 μm complementary metal–oxide–semiconductor (CMOS) gate-arrays fabricated by Fujitsu Limited. The MB86910 floating-point controller was designed to work together with two Weitek chips – the WTL1164 multiplier and WTL1165 arithmetic logic unit – to comprise a floating-point unit.

Last revised
Jul 17, 2026
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Citations
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MB86900
General information
Launched1986
Designed byFujitsu
Performance
Max. CPU clock rate16.67 MHz
Physical specifications
Cores
  • 1
Architecture and classification
Instruction setSPARC V7

The MB86900 is a microprocessor produced by Fujitsu,1 which implements the SPARC V7 instruction set architecture developed by Sun Microsystems. It was the first implementation of SPARC, introduced in 1986, and was used in the first SPARC-based workstation, the Sun Microsystems Sun-4, from 1987.23 Its chipset operated at 16.67 MHz. The chipset consisted of two chips, the MB86900 microprocessor and the MB86910 floating-point controller. The chip set was implemented with two 20,000-gate, 1.2 μm complementary metal–oxide–semiconductor (CMOS) gate-arrays fabricated by Fujitsu Limited.4 The MB86910 floating-point controller was designed to work together with two Weitek chips – the WTL1164 multiplier and WTL1165 arithmetic logic unit – to comprise a floating-point unit.5

References

References

  1. "Fujitsu to take ARM into the realm of Super". The CPU Shack Museum. June 21, 2016. Retrieved 30 June 2019.
  2. "Fujitsu SPARC". cpu-collection.de. Retrieved 30 June 2019.
  3. "Timeline". SPARC International. Retrieved 30 June 2019.
  4. Namjoo, Masood; Agrawal, Anant; Clark Jackson, Daniel; Quach, Le (1988). "CMOS Gate Array Implementation of the SPARC Architecture". COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference. Retrieved 15 December 2025.
  5. Quach, Le; Chueh, Richard (1988). "CMOS Gate Array Implementation of SPARC". COMPCON Spring 88 Thirty-Third IEEE Computer Society International Conference. Retrieved 15 December 2025.
Bibliography

Bibliography

  • Namjoo, M. (1989). "SPARC implementations: ASIC vs. custom design". Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences.